What is the difference between GDDR5, DDR5, and LPDDR5 memory?

DDR5 is short for “DDR-SDRAM 5” which means “Double Data Rate Synchronous Dynamic Random Access Memory generation 5”. It’s the fifth iteration of a RAM technology that uses both rising and descending cycles in memory refresh rates, as opposed to using only the rising cycle of the original SDRAM tech.

DDR5 is the “base” technology, as found in smartphones and computers. It differs from its previous iteration by having much higher clock speeds, it must include self-correcting technology (which was optional until then) and also, if user serviceable, is supposed to perform its own power delivery.

GDDR5 is older than DDR5, and is geared towards graphics usage. It’s the fifth iteration of “Graphics Double Data Rate generation 5″, and the main difference between GDDR and “mainstream” DDR is that it‘s geared towards more bandwidth at the cost of more latency. GDDR5 is technically based on the same technologies as used in DDR4.

LP-DDR5 is a specific version of DDR-SDRAM gen. 5 : “LP” means “Low Power”. Specially selected DDR5 chips are run at a lower voltage than the DDR5 spec asks for, thus having a (much) lower power profile. It is, otherwise, entirely identical to DDR5.

LPDDR5 RAM is fifth generation of DRAM technology on phones, LPDDR5, right from the start of 2020. Apart from phones, LPDDR5 will also find applications in cloud computing, autonomous cars, and AR systems.

Mobile computing has become increasingly demanding and factors like industry switch to high-resolution content, high refresh rate screens, increased reliance on AI for mobile applications, and the impending transition to 5G connectivity further warrant the need for a faster and better memory. Also, RAM is quite easy to market on mobile devices, and OEMs are under constant pressure to innovate.

Voltages have been reduced with LPDDR4x to LPDDR5 (not the VDDQ, though), but this time the power efficiency gains are driven by many different factors and holistic design refinements. These factors include the use of variable voltage (up to 1.1V), improved clocking inspired by GDDR5 memory used in graphics cards, and – primarily – the new deep sleep mode which ensures that LPDDR5 DRAM consumes 50% lesser power in idle mode as compared to LPDDR4x.

Overall, Samsung and JEDEC claim that its LPDDR5 RAM will be up to 30% more power-efficient over LPDDR4x – which is a substantial gain. Micron claims a 20% improvement in power-efficiency over LPDDR4x for its LPDDR5 chips.

Both LPDDR3 and LPDDR4 are high speed synchronous DRAM,but there a number of features on the basis of which they vary:-

1] Prefetch Architecture:-

LPDDR3 is a 8n Prefetch Architecture device which means for every single read/write access,8 external data words needs to be provided while LPDDR4 is a 16n Prefetch Architecture device which means for each single read/write access 16 external data words is required.

The concept of Prefetch is the main reason for the DDR models to work at a higher clock rate or frequency.If we look at each DDR models closely we will find that each time a new revision of DDR comes into market its internal datapath is twice than the other since it requires to store data in the array of capacitors.

2] Number of Channels:-

LPDDR4 consists of two 16 bit channels mostly represented as channel A and channel B unlike LPDDR3 which consists of single 32 bit channel.

Due to two 16 bit channel LPDDR4 reduces the effect of parasitic capacitance and shorter data path access from either side which are unavailable on LPDDR3.

3] Data Rate:-

LPDDR4 has an I/O data rate of 4266 MT/S as compared with the I/O data rate of 2133 MT/S in LPDDR3.

This is possible on the basis of two channel in LPDDR4 which also allows the clock and address bus to be multiplexed along with data bus which further reduces the skew resulting in higher data rate and saves power unlike LPDDR3.

4] Supply Voltage Requirement:-

The supply voltage has been reduced in LPDDR4 which is 1.2V as compared to 1.1V in LPDDR3.

Due to low voltage in LPDDR4,it helps in reducing both switching and static power.

5] I/O Pins:-

LPDDR4 uses either 2 or 4 clock architecture due to which each command uses either 1,2 or 4 clock cycle while transferring the information on the data bus on the positive edge of clock and hence the number of input pins are quite less as compared to other DDR models.

While LPDDR3 uses 2 clock architecture and uses one clock cycle to transfer information on the bus on both positive and negative edge of clock.

Hence in LPDDR4 the number of I/O Pins are quite less as compared to LPDDR3.

6] Commands:-

There are in total of 19 commands in LPDDR4 and they are either stand alone(Refresh,Precharge,Self refresh),4 clocks cycle(Activate 1 -> Activate 2,WR1 -> CAS2, RD1 -> CAS2, MPC1 -> CAS2, MW -> CAS2) or 2 clock cycle(MRW1 -> MRW2)

While on LPDDR3,mostly all the commands took one cycle to execute since there are no commands that execute in pairs.

7] Termination technique:-

LPDDR4 uses NMOS pull down termination which makes it fast while LPDDR3 uses PMOS pull up and a bit slow because of more cascading stages.

8] Burst Length/ODT/CA:-

LPDDR4 has supported burst length of 16,32 and on the fly while LPDDR3 has supported burst length of only 8.

LPDDR4 has supported both CA and DQ ODT features while LPDDR3 has optionally supports only DQ ODT feature.

The count of CA pin is 6 in LPDDR4 while in LPDDR3 it is 10.

9] Interface:-

The interface used for LPDDR4 is LVSTL(Low Voltage swing Terminated Logic) as compared to LPDDR3 which uses HSUL(High Speed Unterminated logic) .

Due to LVSTL technique in LPDDR4 it saves more power than LPDDR3 and increases the thermal profile which in turn increases the battery life of the device.

10] Other features:-

LPDDR4 uses Masked write features along with DBI and DMI functionality which reduced the IO termination power.Along with that many training features like RD DQ calibration training has been included.

The features like PASR which is there in LPDDR3 has been completely removed from LPDDR4.